The present invention is directed to key stream ciphers and more particularly to a hardware architecture that supports the RC4 algorithm.
A cipher is a cryptographic algorithm used for encryption and decryption. A stream cipher is a type of encryption algorithm that encrypts data using a keystream, which is a sequence of bits used as a key. More specifically, a stream cipher, as opposed to a block cipher, processes a variable-length message stream. In a symmetric key algorithm, the same key is used for both encryption and decryption of data. Encryption is accomplished by combining the keystream with the plain text, usually by exclusive-ORing (XOR) the keystream and the plain text. Decryption is accomplished similarly, by combining (XORing) the keystream with the cyphertext.
The most widely used stream cipher today is RC4 (RC4 is a registered trademark of RSA Security Inc.), which was developed in 1987 by Ron Rivest. RC4 is used in many commercial cryptography products for file encryption and secure communications, including LOTUS NOTES software, Apple Computer's AOCE, and Oracle Secure SQL. It is also part of the Cellular Digital Packet Data specification. LOTUS NOTES is a trademark of International Business Machines Corporation.
RC4 is a variable-key size stream cipher with byte-oriented operations. The algorithm is based on the use of a random permutation and the period of the cipher is likely to be greater than 10100. RC4 uses a 256 byte table substitution box (Sbox) that is initialized and permuted with a variable sized key. That is, the table entries are a permutation of the numbers 0 through 255, and the permutation is a function of the variable-length key. Each byte of the plaintext to be encrypted is XORed with a random byte from the table and the table contents are continually shuffled as each byte of the message is processed.
RC4 is usually implemented in software using one or more general purpose processors. However, an ever growing demand for bulk data encryption in wireless and wire line networks is driving the need for hardware accelerators and co-processors capable of processing data faster than existing software implementations.